• Location: Ha Noi's Office OR Ho Chi Minh City
• Work Mode: Hybrid / Flexible Hours
• Experience Level: 4–15 years (Title and banding aligned with seniority)
• Industry: Semiconductors / VLSI

We are seeking a Senior RTL IP-Level Design Engineer to take ownership of designing, integrating, and ensuring the quality of RTL IPs through comprehensive static and functional quality checks. In this role, you will drive the RTL development lifecycle from initial specs through to quality signoff prior to backend handoff.

Key Responsibilities

1. RTL Design & IP Development

• Develop synthesizable RTL (Verilog / SystemVerilog) for IP blocks and subsystems based on micro-architecture specifications.
• Implement clean, scalable, and reusable IP RTL following coding guidelines and industry best practices.
• Design and maintain wrappers, parameterized RTL, and configuration logic.

2. IP Integration & SoC Readiness

• Integrate IPs into subsystem and SoC-level hierarchies.
• Ensure correct clock, reset, power, and interface connectivity across the design.
• Support AMBA-based interfaces (AXI / APB / AHB) and peripheral protocols (SPI, I2C, UART).

3. RTL Quality Checks & Signoff

• Perform rigorous Lint, Clock Domain Crossing (CDC), and Reset Domain Crossing (RDC) analyses.
• Collaborate with cross-functional teams to debug, optimize, and clear signoff criteria before handoff to the physical design team.

Required Skills & Qualifications

• Education: B.Tech / M.Tech in Electronics, Electrical, Computer Engineering, or a related discipline.
• Hardware Description Languages: Strong proficiency in Verilog and SystemVerilog.
• RTL Quality Tools: Hands-on experience with tools such as SpyGlass Lint / CDC / RDC, Questa CDC, VC-RDC, or equivalent.
• Simulation & Debug: Expert usage of VCS, Questa, Xcelium, Verdi, or DVE.
• Automation/Scripting: Highly proficient in Python, Perl, or Shell scripting for workflow automation.
• Soft Skills: Excellent analytical, debugging, and cross-functional communication skills.

What We Offer (Benefits & Perks)

• Work-Life Balance: True hybrid working model with flexible hours and no micromanaged time tracking.
• Financial Security: 100% full salary from day one, 13th-month salary, and an insurance plan based fully on your gross salary.
• Premium Healthcare: Comprehensive Medical Benefit package covering both the employee and their immediate family members.
• Generous Time Off: 18 paid leaves per year
• Global Exposure: Opportunity to work within a diverse, multinational team with potential global travel and onsite assignments across 60 countries.
• Continuous Learning: Access to specialized internal technical, functional, and professional English training programs.

About the Client

Our client is a premier global technology powerhouse operating across 60 countries with a workforce of over 220,000 professionals. As an industry leader in engineering, digital, and AI-driven solutions, they serve as a strategic partner to the world’s top chip manufacturers and foundries.

With over 25 years of semiconductor innovation, their VLSI division offers a robust "Concept to Chip" ecosystem, tackling complex designs at the most advanced process nodes (7nm, 5nm, and beyond) across high-growth sectors like AI, 5G, Automotive, and Data Centers.